The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 20, 1997
Filed:
Apr. 15, 1994
Timothy W Sheen, Brighton, MA (US);
Jiann-Neng Chen, Newton, MA (US);
Stephen A Cohen, Andover, MA (US);
Michael A Baglino, Sharon, MA (US);
Joseph F Wrinn, Quincy, MA (US);
Teradyne, Inc., Boston, MA (US);
Abstract
An apparatus and method are disclosed for testing connections between printed circuit boards and components mounted thereon. A conductive loop is formed by forward biasing a parasitic diode that is inherently present between an integrated circuit (IC) lead and the ground plane of the IC. A magnetic field is created by an antenna mounted above the component to be tested. When the antenna is energized by an RF source, a voltage is induced in the conductive loop if the loop is continuous, i.e., if all of the connections are properly made. The voltage in the loop is measured and compared to a selected threshold to produce a pass/fail indication. This tester may be implemented as an improvement to a standard type of 'bed-of-nails' printed circuit board tester. The antenna may be implemented as an array of spiral loop antennas, with adjacent antennas producing magnetic fields that are 90 degrees out of phase with each other.