The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 20, 1997
Filed:
Dec. 15, 1994
Applicant:
Inventor:
Koichiro Okumura, Tokyo, JP;
Assignee:
NEC Corporation, Tokyo, JP;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
257211 ; 257758 ; 257773 ;
Abstract
A multilevel interconnection structure for semiconductor integrated circuits has five or more multiple interconnection layers, each of which includes a plurality of interconnections, wherein the lower level interconnections included in first to third interconnection layers form the lowest level interconnection layer have pitches less than 2 micrometers and the high level interconnections included in the remaining interconnection layers have pitches in the range from 2 to 3 micrometers.
Okumura, Koichiro. (1997). Semiconductor integrated circuits with specific pitch multilevel (U.S. Patent No. 5631478). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5631478
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile