The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 06, 1997

Filed:

Jul. 17, 1995
Applicant:
Inventor:

Satya Chillara, San Jose, CA (US);

Assignee:

National Semiconductor Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
257668 ; 257693 ; 257697 ; 257778 ; 361760 ; 361767 ;
Abstract

An integrated circuit assembly includes an integrated circuit chip having a plurality of input/output terminals arranged at a surface thereof, and an electrically conductive layer connected to such surface of the integrated circuit chip. The layer is electrically conductive in thickness and electrically insulative in width and length. The assembly may further include a dielectric substrate connected to the layer such that the layer electrically connects respective terminals of the integrated circuit chip to respective electrically conductive traces of the dielectric substrate. An array of contacts may be electrically connected to the traces of the dielectric substrate.


Find Patent Forward Citations

Chillara, Satya. (1997). Integrated circuit assembly incorporating an anisotropic elecctrically (U.S. Patent No. 5627405). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5627405

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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