The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 29, 1997
Filed:
Jun. 06, 1994
Steven G Roskowski, San Jose, CA (US);
Stephen G Perlman, Mountain View, CA (US);
Catapult Entertainment Inc., Cupertino, CA (US);
Abstract
A video game enhancement system for modifying and enhancing the operation of a video game is disclosed. The system includes: 1) a processor interface for coupling the video game enhancement system with a processor; 2) a memory interface for coupling the video game enhancement system with a first memory having executable game logic residing therein; 3) a second memory having executable enhancement logic residing therein; and 4) control logic including: a) logic for detecting an access to a patch address by the processor; b) logic for directing the processor to access an exception region in the second memory upon detection of the access to the patch address, the access to the exception region causing activation of an exception mode; and c) redirection logic for redirecting memory accesses by the processor from the first memory to the second memory for a plurality of memory accesses upon activation of the exception mode, the processor thereby executing a portion of the executable enhancement logic. The the control logic of the video game enhancement system also includes: 5) logic for detecting an access to a transition address by the processor; 6) logic for directing the processor to terminate the exception mode upon detection of the access to the transition address; and 7) the redirection logic further includes logic for redirecting memory accesses by the processor from the second memory to the first memory upon termination of the exception mode, the processor thereby continuing execution of the executable game logic.