The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 15, 1997
Filed:
May. 11, 1995
Shaw W Lee, Cupertino, CA (US);
Anthony E Panczak, Sunnyvale, CA (US);
Jagdish G Belani, Cupertino, CA (US);
National Semiconductor Corporation, Santa Clara, CA (US);
Abstract
A method of manufacturing an integrated circuit package assembly including (i) an integrated circuit die having a bottom surface and a plurality of input/output terminals, (ii) electrically conductive traces and/or contacts accessible from outside the assembly, and (iii) an encapsulating material encapsulating the integrated circuit die and portions of the electrically conductive traces and/or contacts will be disclosed. The method includes the following steps. First, a temporary support substrate or carrier having a top surface is provided for supporting the integrated circuit package as the package is being assembled. Then, the integrated circuit die is detachably supported on the top surface of the temporary support substrate. Each of the input/output terminals on the integrated circuit die are electrically connected to the electrically conductive traces and/or contacts. Next, the integrated circuit die and at least a portion of the electrically conductive traces and/or contacts are encapsulated with the encapsulating material such that the bottom surface of the integrated circuit die supported by the temporary support substrate is not covered by the encapsulating material. Finally, the encapsulated integrated circuit die is detached from the temporary support substrate.