The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 08, 1997
Filed:
Dec. 18, 1995
Daniel D Siems, Boerne, TX (US);
Judy U Galloway, Fair Oaks, TX (US);
Clayton Lantz, San Antonio, TX (US);
VLSI Technology, Inc., San Jose, CA (US);
Abstract
A method and process for reducing edge-related defects. The present invention comprises the steps of calibrating multiple process units such that the multiple process units are equally referenced with respect to an edge of a semiconductor wafer. The calibrated multiple process units are then utilized to precisely control respective termination distances of deposited substrate layers with respect to the edge of the semiconductor wafer. Furthermore, the deposited substrate layers are selectively stacked in manner which prevents semiconductor wafer edge-related defects. In so doing, the present claimed invention increases semiconductor device yields.