The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 01, 1997

Filed:

Feb. 07, 1995
Applicant:
Inventors:

Edward L Solari, Monmouth, OR (US);

Thomas A Heckenberg, Forest Grove, OR (US);

Subbarao Vanka, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ; G06F / ;
U.S. Cl.
CPC ...
395800 ; 364D / ; 364D / ; 3642295 ; 3642455 ; 36424691 ; 3642473 ; 3642517 ; 3642549 ; 3642551 ; 3642558 ; 364242 ; 364243 ;
Abstract

An execution speed controller for controlling the effective processing rate of a microprocessor including an internal cache memory. In one embodiment, the execution speed controller monitors the activities of the microprocessor to determine when it is executing a section of code whose execution should be slowed. When such a determination is made, the execution speed controller periodically asserts at least one control input to the microprocessor. This periodically prevents the microprocessor from accessing the main memory and the internal cache memory, thereby slowing microprocessor execution. In this embodiment, only those software applications requiring slow down are effected. Newer software applications may not require this mode and may run at full speed. An alternate embodiment that does not require a triggering event is also described. In this embodiment, execution of all software applications is slowed down. This is referred to as the 'compatibility' mode.


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