The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 18, 1997

Filed:

Jan. 31, 1995
Applicant:
Inventors:

M M Farahani, Austin, TX (US);

Shyam Garg, Austin, TX (US);

Assignee:

Advanced Micro Devices, Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
437190 ; 437192 ; 437200 ;
Abstract

An improved method is provided for fabricating a metallization structure upon a semiconductor wafer. The method performs nitridation upon a sputter-deposited Ti layer over junction regions prior to silicidation thereof. Further, nitridation and silicidation are each performed at controlled amounts within the Ti layer overlying field dielectric regions, also included in the semiconductor wafer. Nitridation and silicidation thereby occur during a three-step anneal process of a previously deposited Ti layer. The three anneal steps are carried forward at separate and distinct temperatures, wherein the first anneal temperature is followed by a second, higher anneal temperature, and wherein the second anneal cycle is followed by a third anneal cycle of higher temperature than the first or second anneal temperatures. The resulting TiN/Ti/TiSi.sub.2 tri-layer is optimized having the thickest possible TiN film over the junctions and dielectric regions, and further having excellant adherence of the TiN film to the dielectric.


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