The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 04, 1997
Filed:
Apr. 28, 1993
Applicant:
Inventors:
Mieko Suzuki, Tokyo, JP;
Tetsuya Homma, Tokyo, JP;
Assignee:
NEC Corporation, Tokyo, JP;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ;
U.S. Cl.
CPC ...
437195 ; 437228 ; 437231 ;
Abstract
The invention provides a fabrication method of multilevel interconnections for semiconductor integrated circuits. Aluminium wiring lines are formed on a first silicon oxide film overlying a silicon substrate. A second silicon oxide film is grown by a plasma chemical vapor deposition on the wiring lines and the first silicon oxide film for a specific surface treatment of either an etching with use of fluorine compounds or an ion-implantation of fluorine compounds. A third silicon oxide film is grown on the second silicon oxide film by an atmospheric pressure chemical vapor deposition with use of organic silicon compounds and an oxygen including ozone.