The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 18, 1997

Filed:

Dec. 19, 1994
Applicant:
Inventors:

George R Munce, Aloha, OR (US);

James D Warren, Hillsboro, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ; G06F / ;
U.S. Cl.
CPC ...
395311 ; 395442 ;
Abstract

A cache SRAM connector assembly comprising a connector, a number of latches, and a number of high performance switches, is provided to a computer system. The connector removably connects either asynchronous or burst cache SRAM to a processor bus. The latches store cache access addresses being driven on a number of address lines of the processor bus. The high performance switches being coupled to both the latches and the address lines of the processor bus selectively provide the cache SRAM with latched access addresses as required by asynchronous cache SRAM or directly driven access addresses on the processor bus as required by burst cache SRAM.


Find Patent Forward Citations

Munce, George. (1997). Method and apparatus for removably connecting either asynchronous or (U.S. Patent No. 5604875). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5604875

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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