The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 18, 1997

Filed:

Apr. 21, 1995
Applicant:
Inventors:

Mehran Matloubian, Encino, CA (US);

Linda M Jelloian, Northridge, CA (US);

Mark Lui, Thousand Oaks, CA (US);

Takyiu Liu, Newbury Park, CA (US);

Assignee:

Hughes Aircraft Company, Los Angeles, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
117 94 ; 117103 ; 117106 ; 117108 ; 117953 ; 437133 ;
Abstract

High breakdown voltages for AlInAs layers in InP-based devices, such as a gate layer in an InP HEMT or a collector layer in a heterojunction bipolar transistor, are achieved by growing the AlInAs layer by MBE at a substrate temperature about 70.degree.-125.degree. C. below the temperature at which a 2.times.4 reflective high energy diffraction pattern is observed. This corresponds to a growth temperature range of about 415.degree.-470.degree. C. for a 540.degree. 2.times.4 reconstruction temperature. Preferred growth temperatures within these ranges are 80.degree. C. below the 2.times.4 reconstruction temperature, or about 460.degree. C. Higher breakdown voltages are obtained than when the AlInAs layer is grown at either higher or lower temperatures.


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Matloubian, Mehran. (1997). Method of growing high breakdown voltage allnas layers in inp devices by (U.S. Patent No. 5603765). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5603765

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