The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 11, 1997

Filed:

Mar. 06, 1995
Applicant:
Inventors:

Hisayasu Satoh, Hyogo, JP;

Kimio Ueda, Hyogo, JP;

Nagisa Sasaki, Hyogo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ;
U.S. Cl.
CPC ...
326126 ; 326 18 ; 326 26 ;
Abstract

An emitter-coupled logic circuit having superior drivability, stable operation, and obtaining complementary outputs. A pair of input differential transistors have their emitters coupled to a first current source in common, their bases connected to receive respective input signals, and outputting complementary logic values corresponding to the respective input signals. Pull-up and pull-down transistors are provided for respective ones of a pair of output terminals. Bases of the pull-up transistors are supplied with collector voltages of the input transistors and their emitters are connected to the respective output terminals. The bases of the pull-down transistors are supplied with the respective input signals, their emitters are coupled to a second current source in common, and their collectors are connected to the respective output terminals. A stabilizing circuit is connected to the respective output terminals to maintain the pull-up transistors in conducting states.


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