The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 31, 1996

Filed:

Feb. 28, 1994
Applicant:
Inventor:

Hironobu Nakao, Kyoto, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
257325 ; 257410 ; 257411 ;
Abstract

A semiconductor nonvolatile memory comprised of a p-type silicon substrate 3, an n.sup.+ drain 5 and an n.sup.+ source 9, the source and the drain regions defining an MOS channel region 7. On top of the channel region 7 there are laminated a silicon dioxide film 18 and a semiconductor rich oxide film 20 which has been nitrided so as to leave silicon nitride region therein. Further on top of these layers, there is formed a polysilicon film 22, which is etched to form a control electrode. By using the memory cell and appropriate select transistors, a semiconductor nonvolatile memory (EPROM) is constructed.


Find Patent Forward Citations

Nakao, Hironobu. (1996). Semiconductor nonvolatile memory (U.S. Patent No. 5589700). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5589700

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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