The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 10, 1996

Filed:

Apr. 19, 1994
Applicant:
Inventor:

Bryan J Dinteman, Beaverton, OR (US);

Assignee:

Credence Systems Corporation, Fremont, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R / ; G01R / ;
U.S. Cl.
CPC ...
3241581 ; 324 731 ;
Abstract

Apparatus for testing an integrated circuit device (DUT) having an input port and an output port comprises multiple state devices each having multiple states that occur in a predetermined sequence and each having an output port at which it provides an event signal representative of its current state. At least a first of the state devices is an emitting device that emits an event marker signal at a predetermined time in advance of entering a predefined state, at least a second of the state devices is a receiving device that responds to receipt of an event marker signal in a predetermined manner after lapse of a predetermined time, at least one of the state devices has its output port connected to the input port of the DUT, and at least one of the state devices is a measurement device connected to the output port of the DUT. An interconnection matrix is connected to each state device and allows each state device to communicate an event marker signal to each other state device.


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