The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 26, 1996

Filed:

Dec. 15, 1994
Applicant:
Inventors:

Hidetoshi Koike, Kawasaki, JP;

Kazunari Ishimaru, Yokohama, JP;

Hiroshi Gojohbori, Yokohama, JP;

Fumitomo Matsuoka, Kawasaki, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
437 67 ; 437 62 ; 437 63 ; 437 64 ; 437981 ; 148D / ; 148D / ;
Abstract

A semiconductor device comprises a semiconductor substrate having a major surface, a trench device isolation region having a trench selectively formed to define at least one island region in the major surface of the semiconductor substrate and a filler insulatively formed within the trench, an elongated gate electrode insulatively formed over a central portion of the island region so that each of its both ends which are opposed to each other in the direction of its length overlaps the trench device isolation region, and source and drain regions formed within the island region on the both sides of the gate electrode. The surface of the trench device isolation region is formed lower than the major surface of the semiconductor substrate. Those portions of the major surface of the semiconductor substrate that are located under the gate electrode at the boundary with the trench device isolation region are rounded, and the radius of curvature of these portions of the major surface of the semiconductor substrate is selected to be not less than 50 nm.


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