The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 05, 1996
Filed:
Aug. 22, 1995
Rodney R Rozman, Placerville, CA (US);
Michael P Vital, Orangevale, CA (US);
Peter K Hazen, Auburn, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A nonvolatile memory includes a memory array, control circuitry coupled to the memory array for controlling memory operations with respect to the memory array, and a configuration cell coupled to the control circuitry for generating a configuration signal to configure the nonvolatile memory with respect to the memory operations. The configuration cell can be programmed in a first state and a second state. A configuration logic is coupled to the configuration cell and the control circuitry for altering the configuration signal from the configuration cell to the control circuitry without causing the configuration cell to be reprogrammed. The configuration logic includes an exclusive or gate that temporarily alters the configuration signal without affecting a programmed state of the configuration cell. The configuration logic can also disable the configuration signal to the control circuitry and configure the nonvolatile memory with a temporary configuration information stored in a configuration register of the configuration logic.