The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 08, 1996

Filed:

Apr. 07, 1995
Applicant:
Inventors:

Yoshiyuki Tsuru, Shimodate, JP;

Shigeharu Arike, Tochigi-ken, JP;

Takashi Sugiyama, Shimodate, JP;

Shinjirou Miyashita, Shimodate, JP;

Takayuki Suzuki, Shimodate, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
B32B / ;
U.S. Cl.
CPC ...
428209 ; 174255 ; 174256 ; 361746 ; 257702 ; 257729 ;
Abstract

A multilayer printed wiring board comprising a plurality of interlaminar insulating layers, a plurality of insulating circuit boards having circuits formed on the insulating substrates, and via holes for making electrical connection between two or more layers of circuits, wherein the difference between the glass transition point of an interlaminar insulating layer and that of the adjoining insulating substrate is not greater than 60.degree. C., is proof against exfoliation due to heat history of the board and has high reliability of insulation and through-hole connection.


Find Patent Forward Citations

Tsuru, Yoshiyuki. (1996). Multilayer printed wiring board (U.S. Patent No. 5562971). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5562971

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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