The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 01, 1996
Filed:
Aug. 30, 1994
Alexander H Owens, Los Gatos, CA (US);
Shahin Toutounchi, Pleasanton, CA (US);
Abraham Yee, Cupertino, CA (US);
Michael Lyu, Saratoga, CA (US);
LSI Logic Corporation, Milpitas, CA (US);
Abstract
A CMOS integrated circuit structure is disclosed having a patterned nitride passivation layer, wherein the nitride is patterned such that it does not overlie the thin gate oxide portions of one or more of the MOS devices. When protection against the effects of external radiation is desired, the thin gate oxide areas of the PMOS devices are left uncovered by the patterned nitride passivation layer. When protection is desired against the effects of internally generated 'hot electrons', the thin gate oxide areas of the NMOS devices are left uncovered by the patterned nitride passivation layer.