The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 24, 1996
Filed:
May. 31, 1995
John E Finklea, Garland, TX (US);
Chi-Cheong Shen, Richardson, TX (US);
Kenneth G Vickers, Whitesboro, TX (US);
Mark A Kressley, Richardson, TX (US);
Texas Instruments Inc., Dallas, TX (US);
Abstract
A method of fabricating an anode plate 40 having a multiplicity of grooves 50 for use in a field emission flat panel display device comprises the steps of providing a transparent planar substrate 42 having a plurality of electrically conductive, parallel stripes 46 comprising the anode electrode of the device; etching a plurality of grooves 50 in the surface of the substrate in the spaces between the stripes 46; and then applying phosphor material 48.sub.R, 48.sub.G and 48.sub.B over the stripes 46. In one embodiment, a plurality of grooves 50', having generally vertical sidewalls, are formed in the upper surface of planar substrate 42' at the interstices of conductors 46. In a second embodiment, a plurality of grooves 50', having generally curved sidewalls, are formed in the upper surface of planar substrate 42' at the interstices of conductors 46'. In a third embodiment, a plurality of grooves 50', having generally vertical sidewalls, are formed in the upper surface of an insulating material 52 located between conductors 46'. In a fourth embodiment, a plurality of grooves 50'', having generally curved sidewalls, are formed in the upper surface of an insulating material 52' between conductors 46''. In a fifth embodiment, a plurality of grooves are formed in the upper surface of planar substrate 100, and insulating material 108 is applied over the grooves. In a sixth embodiment, a plurality of grooves are formed in both the surface of the planar substrate 120 and the surface of insulating material 128.