The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 17, 1996

Filed:

Oct. 07, 1994
Applicant:
Inventor:

Noriyuki Ohta, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ; G11C / ;
U.S. Cl.
CPC ...
257315 ; 257321 ; 257322 ; 36518501 ;
Abstract

A nonvolatile semiconductor memory device with improved writing characteristics. The memory device has memory cell transistors arranged in rows and columns. The memory cell transistors belonging to the same column share a source region and a drain region, and a channel region is disposed between the source and drain regions. The interval between the source and drain regions is the isolation width. Each of the memory cell transistors has a floating gate electrode disposed on the channel region with a first gate insulating film and a control gate electrode disposed on the floating gate electrode with a second gate insulating film. The floating gate electrode does not have a constant width and has a portion narrower than the isolation width which is free from the floating gate electrode. The narrower portion is typically formed as a constricted portion of the floating gate electrode.


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