The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 03, 1996
Filed:
Oct. 24, 1995
David M Kalish, Laguna Niguel, CA (US);
Saul Barajas, Mission Viejo, CA (US);
Paul B Ricci, Laguna Niguel, CA (US);
Unisys Corporation, Blue Bell, PA (US);
Abstract
A method and implementation is supplied for the synchronous loading and integrity checking of registers located in two different integrated circuit chips. Thus in a computer system having cache memory where the cache memory is sliced into two portions, one of which holds even addresses and the other of which holds odd addresses, there is provided two individual chips each of which has a program word address register which is loaded at the exact same period of time and which is additionally incremented in both cases at the exact same period of time. Further means are provided for checking the integrity of the program word address registers in the first slice and the second slice of the cache in order to insure that they are coherent, or if not coherent, then a disable signal will prevent usage of the address data involved.