The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 03, 1996
Filed:
May. 11, 1994
Ming-Chang Su, Kaohsiung, TW;
Jenn-Liang Chang, Kaohsiung, TW;
Macronix International Co., Ltd., Hsinchu, TW;
Abstract
An apparatus for automatic configuration of multiple peripheral interface subsystems in a computer system, the computer system including a system expansion bus for adopting a plurality of functional peripheral interface subsystems, the apparatus comprises a software identification code buffer for buffering a software-generated identification code sent via the system expansion bus; a hardware identification code memory for storing a unique hardware identification code; a software identification code register for transmitting the software identification code via the system expansion bus for the access of the computer system; an instruction register for receiving instructions transmitted by the computer system; a hardware identification code detector for receiving the instruction transmitted by the computer system and stored in the instruction register to control the hardware identification code detector; and an automatic jump state circuit for receiving the instruction transmitted by the computer system and registered by the instruction register and for receiving the control signal sent by the hardware identification code detector to control the jump-seeking of address space in the computer system. The hardware identification code detector compares the hardware identification code stored in the hardware identification code memory with a software identification code bufferred in the software identification code buffer under the control of the software routine. Upon the mismatch result of the comparison, a newly generated trial software identification code is compared with the hardware identification code, until both the generated software identification code and the hardware identification code match each other. The automatic jumping state circuit locks the current address space upon the comparison match of the software and hardware identification codes.