The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 03, 1996

Filed:

Jun. 19, 1996
Applicant:
Inventors:

Kerry D Tedrow, Orangevale, CA (US);

Cesar Galindo, Stockton, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365226 ; 36518533 ;
Abstract

An integrated circuit arrangement for providing operating voltages for a flash EEPROM memory array, which integrated circuit arrangement utilizes a plurality of charge pumps in a staggered output arrangement to generate a high voltage output while generating lower amounts of current from each individual charge pump so that the provision of the necessary current is integrated over the entire period of the voltage output. Unique circuitry is provided for regulating the value of the output voltage produced by the arrangement in response to variations in the output voltage produced.


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