The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 03, 1996
Filed:
Dec. 01, 1994
Mukesh T Lulla, Santa Clara, CA (US);
William D Cox, Milpitas, CA (US);
QuickLogic Corporation, Santa Clara, CA (US);
Abstract
A sequence of antifuses to be programmed is determined by: determining whether a first antifuse of an unordered list of antifuses to be programmed could be programmed last without programming any antifuses which are not to be programmed, determining whether a second antifuse of the unordered list could be programmed last without programming any antifuses which are not be programmed, and determining whether the first and second antifuses could be programmed simultaneously without programming any antifuses which are not to be programmed. In this way, a programming set of antifuses which could be programmed simultaneously is determined. Once determined, the antifuses making up the programming set are added to the head of an ordered list and are removed from the unordered list. By repeatedly determining programming sets of antifuses and adding each successive set of antifuses to an ordered list of antifuses, an antifuse programming sequence is developed. An FPGA is programmed by simultaneously programming the antifuses in each programming set, the programming sets being programmed in the order they appear in the ordered list.