The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 13, 1996

Filed:

Dec. 12, 1994
Applicant:
Inventors:

Eiji Shinozaki, Tokyo, JP;

Kiyoshi Fukahori, Tokyo, JP;

Masafumi Kurisu, Kanagawa, JP;

Assignee:

Silicon Systems, Inc., Tustin, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
327 59 ; 327 62 ; 327 73 ;
Abstract

The peak voltage detector according to the present invention includes (a) an input and output terminals, (b) a comparator for comparing the input terminal voltage to the output terminal voltage, (c) a hold capacitor coupled to the output terminal, and (d) a charge pump coupled between the comparator and the hold capacitor. The charge pump has (i) a current reduction circuit for reducing a charge current that charges the hold capacitor, (ii) a differential input pair for receiving the output voltages of the comparator, (iii) a current mirror for mirroring a current in the differential input pair to the charge current, and (iv) a current source. To detect the peak of the input terminal voltage, the peak voltage detector of the present invention compares the input terminal voltage to the output terminal voltage, and charges the output terminal when the input terminal voltage is greater than the output terminal voltage until the output terminal voltage is substantially equal to the input terminal voltage. As the output terminal voltage increases, the level of the charge current that charges the hold capacitor is reduced, thus producing a smaller error in the acquired voltage at the output terminal. To reduce the error further in the acquired output terminal voltage, the peak voltage detector of the present invention may also have a leakage current coupled between the output terminal and ground.


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