The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 13, 1996

Filed:

Oct. 24, 1994
Applicant:
Inventors:

Shih K Cheng, Scottsdale, AZ (US);

Marius Orlowski, Austin, TX (US);

Assignee:

Motorola, Inc., Schaumburg, IL (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
437 40 ; 437 44 ; 437 41 ; 437 45 ; 437 27 ;
Abstract

Insulated gate semiconductor device (10) and a method of manufacturing the insulated gate semiconductor device (10). The insulated gate semiconductor device (10) includes an N-channel transistor (15) and a P-channel transistor (16). The N-channel transistor (15) has a gate electrode (35) that has a central portion (28) and two adjacent gate extensions (49, 52). Likewise the P-channel transistor (16) has a gate electrode (35') which has a central portion (29) and two adjacent gate extensions (53, 54). The gate extensions (49, 52, 53, 54) allow the formation of graded channel regions underneath the gate electrodes (35, 35') and adjacent to the source (57, 59) and drain (58, 62) regions by offsetting an LDD or a single heavily doped source/drain implant from channel regions which are covered by the gate extensions (49, 52 53, 54).


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