The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 30, 1996

Filed:

Jun. 07, 1995
Applicant:
Inventors:

Hiroyuki Miwa, Kanagawa, JP;

Shigeru Kanematsu, Kanagawa, JP;

Takayuki Gomi, Tokyo, JP;

Hiroaki Anmo, Kanagawa, JP;

Takashi Noguchi, Kanagawa, JP;

Katsuyuki Kato, Kanagawa, JP;

Hirokazu Ejiri, Kanagawa, JP;

Norikazu Ouchi, Kanagawa, JP;

Assignee:

Sony Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
437 31 ; 437150 ; 437162 ; 437191 ; 437193 ; 437195 ; 437200 ; 148D / ; 257518 ; 257554 ; 257588 ; 257592 ;
Abstract

A semiconductor device and a manufacturing method therefor which can simultaneously realize both a reduction in base transit time by a reduction in base width and a reduction in base resistance by a reduction in link base resistance. The semiconductor device is manufactured by the method including the steps of forming a first impurity diffused layer of a first conduction type in a semiconductor substrate; forming a conducting film connected to the first impurity diffused layer; forming a first insulating film on the conducting film; forming a first hole through a laminated film composed of the first insulating film and the conducting film; forming a second impurity diffused layer of the first conduction type in the semiconductor substrate exposed to the first hole; forming a side wall from a second insulating film in the first hole to form a second hole; and forming a third impurity diffused layer of the first conduction type in the semiconductor substrate exposed to the second hole.


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