The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 04, 1996

Filed:

Feb. 25, 1994
Applicant:
Inventors:

James S Griffth, Aloha, OR (US);

Shantanu R Gupta, Beaverton, OR (US);

Narayan Hegde, Beaverton, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
395800 ; 395375 ; 364D / ; 3642318 ; 3642624 ; 364263 ; 36423223 ; 36423222 ;
Abstract

A method and apparatus for handling resource allocation during processor stall conditions. The instruction issue components of a processor are stalled (e.g., the issuance of new instruction is frozen) as a result of various stall conditions. One stall condition (full stall) occurs when an allocated buffer resource becomes full. Another stall condition (partial stall) occurs during register renaming and a given instruction sources a larger register width than the register alias table currently contains within the RAT buffer. This is a partial width data dependency and a partial stall is asserted. The present invention, upon detection of a full stall, does not allocate any buffer entries within the clock cycle that causing the full stall and resource pointers are not advanced and instructions issued during that clock cycle are not allocated. Within the clock cycle of the deassertion of the full stall, the resource buffers are allocated and the resource allocation pointers are updated. The present invention, upon detection of a partial stall, allocates a partial number of instructions within the clock cycle that causes the partial stall and updates a retirement entry pointer to the ROB but does not advance the resource pointers. Upon the clock cycle of the deassertion of the partial stall, the remainder of the instructions are allocated to the resource buffers and the resource pointers are advanced. In the event a full and partial stall are asserted concurrently, the full stall takes priority.


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