The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 04, 1996

Filed:

Dec. 01, 1994
Applicant:
Inventors:

Gunter Donig, Poing, DE;

Edmund Goetz, Dachau, DE;

Helmut Herrmann, Munchen, DE;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
377108 ; 377 48 ; 377104 ; 327176 ;
Abstract

A circuit configuration generates an even-numbered duty factor with an odd-numbered division n of a symmetrical clock signal. A first device generates a first output signal from the symmetrical clock signal. The first output signal begins upon each n.sup.th edge of one type, of a symmetrical clock signal and remains active for a length of N-1/2 periods of the symmetrical clock signal. A second device generates a second output signal from the symmetrical clock signal. The second output signal begins upon each n.sup.th edge of another type, of the symmetrical clock signal and remains active for the length of N-1/2 periods of the symmetrical clock signal. A logic linkage is connected to the first and second devices for linking the two output signals to form one symmetrical output signal.


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