The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 21, 1996
Filed:
Feb. 26, 1993
Deif N Atallah, Chandler, AZ (US);
Yan Xu, Chandler, AZ (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A system which is able to perform unaligned big endian and little endian accesses to memory with little or no added overhead to the system. In the preferred embodiment, the processor operates in little endian data format. The memory, however, can store data in big endian and little endian format in different memory regions. If an unaligned access is to be performed, the access requires translation to corresponding aligned memory accesses. However, if the processor operates in little endian format and accesses are to memory which store according big endian format, special code is required to perform proper translation of accesses. When the address generation unit of the processor detects an unaligned memory access, an unaligned signal is set which causes a microassist to initiate a microflow to execute microcode which performs the necessary translations for unaligned accesses. The address generation unit also sends the address to be access to the memory region table which maintains information regarding each memory region, including whether the region is big endian or little endian. The state bit indicative of the data format is logically combined with the unaligned access signal to generate an output which sets the state of the flag. The flag is then accessed by the microcode to determine the translation routine to process the memory access.