The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 14, 1996

Filed:

Oct. 30, 1991
Applicant:
Inventors:

Motomasa Imai, Fuchu-shi, Tokyo, JP;

Kazuhide Abe, Saiwai-ku, Kawasaki-shi, JP;

Koji Yamakawa, Takatsu-ku, Kawasaki-shi, JP;

Hiroshi Toyoda, Fujisawa-shi, Kanagawa-ken, JP;

Yoshiko Kohanawa, Yokohama-shi, JP;

Mitsuo Harata, Tama-ku, Kawasaki-shi, JP;

Assignee:

Other;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365145 ; 365149 ; 365208 ; 365210 ;
Abstract

A non-volatile semiconductor memory device, includes a memory cell having a capacitor formed by stacking a semiconductor layer and a ferroelectric layer between a pair of electrodes, the semiconductor layer and the ferroelectric layer forming a semiconductor-ferroelectric junction, a writing circuit in which a voltage higher than a coercive electric field of the ferroelectric material is applied to the capacitor of the memory cell to align a polarization direction of the ferroelectric layer in a predetermined direction so as to set a capacitance of the capacitor at a predetermined value, thereby writing data corresponding to the predetermined value of the capacitance, and a reading circuit in which a voltage less than the coercive electric field of the ferroelectric layer is applied to the capacitor of the memory cell in which the data is written, thereby reading the data.


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