The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 07, 1996
Filed:
Dec. 20, 1994
Kabushiki Kaisha Toshiba, Kawasaki, JP;
Abstract
An EEPROM in which a select transistor to which any memory cell not selected is turned off to inhibit electron injections into the floating gate of the memory cell not selected. The memory cells of the EEPROM are arranged in rows and columns in a substrate. The memory cells forming each column are connected in series. The two endmost memory cells are connected to two select transistors, respectively. The bit lines are connected to a data latch/sense amplifier, which is connected to a column decoder. The column decoder controls the bit lines. A row decoder controls select gates and control gates. A voltage-boosting circuit generates a high voltage, which is applied to the substrate and the select gates to erase data in the EEPROM, and to the control gates to write data into the EEPROM. A low-voltage controller generates a low voltage, which is applied to the select gates for turning off the select transistors of the column not selected, thereby to prevent data-writing.