The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 30, 1996
Filed:
Dec. 19, 1994
Mickey L Fandrich, Placerville, CA (US);
Virgil N Kynett, El Dorado Hills, CA (US);
Salim B Fedel, Folsom, CA (US);
Thomas C Price, Fair Oaks, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A nonvolatile memory comprises a memory array and a control circuit coupled to the memory array for performing memory operations with respect to the memory array. A storage circuit associated with the memory array is provided for storing a data. When the data is stored in the storage circuit, the memory array is locked from being accessed for the memory operations. A logic circuit is coupled to the control circuit and the storage circuit for preventing the control circuit from accessing the memory array with respect to the memory operations in accordance with the data. The logic circuit prevents the control circuit from accessing the memory array when the storage circuit stores the data. A control input is provided for receiving a control signal. The control signal is applied to the logic circuit and can be in a first voltage state and a second voltage state. When the control signal is in the first voltage state, the logic circuit is enabled to lock the memory array with respect to the memory operations in accordance with the data stored in the storage circuit. When the control signal is in the second voltage state, the logic circuit is disabled to lock the memory array and the memory array is allowed for the memory operations regardless of the data stored in the storage circuit.