The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 23, 1996

Filed:

May. 17, 1994
Applicant:
Inventors:

William Kammerer, Mountain View, CA (US);

Baruch R Friedlander, Haifa, IL;

Yaron Slezak, Haifa, IL;

Assignee:

WaferScale Integration, Inc., Fremont, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
36523006 ; 36518911 ; 365203 ; 365204 ;
Abstract

There is provided a memory array including columns of memory cells, source lines and bit lines. The memory array includes precharging apparatus which discharge selected source lines while pre-charging the array. Two embodiments of the pre-charging apparatus are provided. In both, the source lines are connected to a common bit line (CNBL) via groups of source pull-up transistors. The source lines are also connected to a source decoder. In one embodiment, the source decoder discharges selected ones of the disconnected source lines. In another embodiment, the source decoder both discharges selected ones of the disconnected source lines and connects the remaining disconnected source lines to the CNBL line.


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