The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 26, 1996

Filed:

Nov. 22, 1994
Applicant:
Inventor:

John O Borland, South Hamilton, MA (US);

Assignee:

Genus, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
437 34 ; 437154 ; 437931 ;
Abstract

CMOS vertically modulated wells are constructed by using clustered MeV ion implantation to form a structure having a buried implanted layer for laterial isolation.


Find Patent Forward Citations

Borland, John. (1996). Method of constructing cmos vertically modulated wells (vmw) by (U.S. Patent No. 5501993). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5501993

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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