The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 27, 1996
Filed:
Jun. 10, 1994
Applicant:
Inventor:
William L Larson, Colorado Springs, CO (US);
Assignee:
Ramtron International Corporation, Colorado Springs, CO (US);
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ; H01L / ; H01G / ;
U.S. Cl.
CPC ...
257295 ; 257298 ; 257300 ; 257306 ; 365 65 ; 365145 ; 365149 ;
Abstract
A ferroelectric memory cell has an FET covered by an insulation layer and a ferroelectric capacitor located thereover. An interconnect couples an upper plate of the ferroelectric capacitor to a source/drain of the transistor. In a method of forming the cells, after the transistor is fabricated, the bottom electrode and ferroelectric dielectric are established, but the top capacitor electrode is not added until a further layer of insulation is added over the ferroelectric and windows are opened in it. One window is for the top electrode and another window is to one source/drain region of the FET.