The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 06, 1996

Filed:

Jul. 26, 1993
Applicant:
Inventors:

William E Feger, Macungie, PA (US);

Paul W Rutkowski, Morris Plains, NJ (US);

Assignee:

AT&T Corp., Murray Hill, NJ (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R / ;
U.S. Cl.
CPC ...
371 223 ;
Abstract

A Boundary-Scan cell (12') for facilitating testing of an electronic device (10), includes a system flip-flop (30') interposed between an output buffer (18) of the device and an internal logic block (14) which drives the buffer. The system flip-flop has asynchronous clear and preset capability which allows the flip-flop to be cleared or preset as necessary so that its output bit reflects a bit previously latched in the Boundary-Scan cell during testing. During non-testing intervals, the preset and clear capability of the system flip-flop (30') is disabled to allow the flip-flop to pass a bit between the internal logic of the device and the output buffer without undue propagation delays.


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