The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 28, 1995
Filed:
Mar. 17, 1993
Sudarshan Kumar, Aloha, OR (US);
Jashojiban Banik, Aloha, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
An N-bit conditional sum adder comprised of a number of 2-bit adders coupled in series. The 2-bit adders have a sum generation circuit which computes two sum bits from two 2-bit inputs. Each sum bit is processed by a maximum of two multiplexers in series for factoring any carry-ins from preceding 2-bit adders, regardless of the total number of N bits to be added. A carry generation circuit generates two carry signals. The appropriate carry signal is selected for propagation by a multiplexer comprised of a number of p-n passgates. The two carry signals plus their complements are first buffered before being input to the multiplexer. The multiplexer outputs the appropriate carry signal and its complement to be input to a succeeding 2-bit adder and for controlling a succeeding multiplexer selection.