The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 21, 1995
Filed:
May. 11, 1993
Scott E Smith, Sugar Land, TX (US);
Duy-Loan T Le, Missouri City, TX (US);
Michael C Stephens, Jr, Beaverton, OR (US);
Masayoshi Nomura, Ibaraki, JP;
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
An MOS DRAM memory device includes an output buffer having an N-channel output transistor that must receive a boosted gate signal to produce a full Vdd output high logic level signal at the output terminal. The N-channel transistor connects between the Vdd supply voltage and the output terminal. The output buffer connects a Vdd supply voltage to the gate of the output transistor for a short period sufficient to raise the gate to the Vdd voltage level and then disconnects the Vdd supply. The buffer then connects a Vdd+ supply voltage to the gate to increase the gate voltage at least one transistor threshold value above the Vdd supply voltage. This provides the Vdd voltage at the output terminal.