The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 14, 1995

Filed:

Jul. 11, 1994
Applicant:
Inventors:

Joo-young Lee, Kwacheon, KR;

Kyu-pil Lee, Suwon, KR;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
437 60 ; 437203 ; 437919 ;
Abstract

A capacitor of a semiconductor device has a plate electrode which process margin and a method of manufacturing same are disclosed. The plate electrode has a planarized surface and borders a source region. A recessed field oxide layer defining an active region is formed on a semiconductor substrate. Then, an insulating pattern for self-aligning an electrode is formed on the active region. The insulating pattern has a step with respect to the field oxide layer. Thereafter, a trench is formed in the semiconductor substrate by partially removing the field oxide layer, the insulating pattern and a surface portion of the semiconductor substrate. A conductive material is deposited on the semiconductor substrate having the trench and the insulating pattern to form a conductive layer filling the trench. Then, the conductive layer is polished until the insulating pattern is exposed, to thereby obtain an electrode having a planarized surface. The plate electrode does not unnecessarily occupy space of the active region and the plate electrode bordering the active region can be formed by self-alignment with a step between the insulating pattern and the field oxide layer. Therefore, sufficient process margin is provided to generate high yields, and a highly integrated semiconductor device having an AST cell can be realized.


Find Patent Forward Citations

Loading…