The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 31, 1995
Filed:
Apr. 20, 1994
Applicant:
Inventors:
Fumitomo Matsuoka, Kawasaki, JP;
Naoki Ikeda, Yokohama, JP;
Assignee:
Kabushiki Kaisha Toshiba, Kawasaki, JP;
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
437195 ; 437190 ;
Abstract
An amorphous silicon layer is used as an etch stop and is formed on the side wall of a first wiring layer having a predetermined wiring width and formed in a predetermined shape by patterning. A silicon oxide layer is covering the first wiring layer and the amorphous silicon layer, and a through-hole is formed in the silicon oxide layer so that a portion of the first wiring layer is exposed. The width of the through-hole is equal to or larger than the wiring width of the first wiring layer. A tungsten layer is filling the through-hole, and a second wiring layer connected to the tungsten layer is formed on the silicon oxide layer.