The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 24, 1995

Filed:

Jun. 28, 1994
Applicant:
Inventors:

David K Cheung, Milpitas, CA (US);

Egbert Graeve, Los Altos, CA (US);

Assignee:

Schlumberger Technologies, Inc., San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G01R / ;
U.S. Cl.
CPC ...
3241581 ; 324 731 ; 371 223 ;
Abstract

A plurality of 'pin slice' circuits, each associated with a separate pin of the device under test (DUT). Each pin slice circuit contains its own memory and registers and circuitry for generating the necessary test signals. Test data is loaded into the individual pin slice circuits in a vertical word fashion, such that all of the bits of the vertical word correspond to the individual pin, allowing the characteristics of an individual pin test sequence to be varied independently of the other pins. A participate memory is used to select different groupings of the pin slice circuits which are to be programmed in parallel when a group of pins are to receive the same test signals. Separate enable signals to the various stages of the pin slice circuits allow different aspects of the test pattern to be also varied independently.


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