The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 17, 1995

Filed:

Dec. 19, 1994
Applicant:
Inventors:

Min-Gun Kim, Daejeon, KR;

Choong-Hwan Kim, Daejeon, KR;

In-Gab Hwang, Daejeon, KR;

Chang-Seok Lee, Daejeon, KR;

Hyung-Moo Park, Daejeon, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ; H03K / ; H03K / ;
U.S. Cl.
CPC ...
327387 ; 327388 ; 327389 ; 327427 ; 327434 ; 326 25 ; 326 33 ; 326 34 ; 330277 ;
Abstract

Disclosed is a switch circuit which has a depletion mode n-channel MOSFET which can be used in a circuit allowing only a positive voltage to be supplied thereto, comprising a first D-FET having a gate for receiving an input signal, a drain for outputting an output signal and a source; a first resistor connected between the drain of the first D-FET and a positive voltage source to bias the drain of the first D-FET; a second D-FET having a gate connected to an intermittence controlling voltage source, a drain and a source connected to the positive voltage source and the source of the first D-FET 201, respectively; a second resistor connected between the gate of the second D-FET and a ground to bias the gate of the second D-FET; a constant-current source connected between each of the sources of the first and second D-FET and the ground; a bypass capacitor connected in parallel with the constant-current source and between the drain of the constant-current source and the ground to bypass an RF signal to the ground; and a third resistor connected between the gate of the first D-FET 201 and the ground to bias the gate of the first D-FET. Since the switch circuit can be operated only by a positive voltage without use of a negative voltage, it can be embodied with a general depletion mode n-channel MOSFET which can be fabricated by a relatively simple fabrication sequence and has a relatively simple structure in comparison with an enhancement mode n-channel MOSFET.


Find Patent Forward Citations

Loading…