The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 03, 1995
Filed:
Dec. 07, 1994
Linda J Rankin, Beaverton, OR (US);
Mark A Gonzales, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A method and apparatus for detecting and correcting errors in data transferred between a CPU and system memory. System memory typically has a number of dynamic random access memory (DRAM) devices that each have a block of memory cells. The DRAM also has an internal cache that contains a row of memory from a main memory block. Both the cache and block of memory cells contain vertical and horizontal parity bits. Each byte of data bits has an associated horizontal parity bit. Similarly a group of data bits having the same bit position will have an associated vertical parity bit. The parity bits are used to detect and correct errors in data transmissions between a CPU and system memory The cache includes arrays of exclusive OR (XOR) gates that can update the vertical parity bits when one or more bytes of data are written into the DRAM.