The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 08, 1995

Filed:

May. 26, 1993
Applicant:
Inventors:

Antonio Imbruglia, Catania, IT;

Giovanni Benenati, San Giovani la Punta, IT;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
326 33 ; 326 31 ; 326 83 ;
Abstract

A CMOS logic circuit with biased inputs to a predetermined logic level, being of a type including at least one signal input terminal and logic gates for acting on an input signal, and further including a circuit portion which is connected to the signal input terminal, and includes a high-value resistance effective to bias the input signal.


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