The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 18, 1995
Filed:
Jul. 07, 1994
Daniel J Deleganes, Hillsboro, OR (US);
Robert D Creek, Aloha, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A precharge circuit for adjusting and maintaining a bitline of a ROM to a pre-determined precharge voltage. The circuit is comprised of P-channel pull-up transistors for initially placing an input line and a node of the precharge circuit at the supply voltage. A relatively small transistor is coupled to the node. Its function is to pull the node's voltage down when a control signal is activated. A larger transistor is also coupled to the node. The larger transistor is used to compensate for the pull down action of the small transistor. The relative sizes of the small transistor versus the larger transistor is made such that the node is placed at the desired quiescent level. The node is maintained at this level until the wordline is activated and the programmed bitline begins discharging. When discharging of the bitline causes the node's voltage to fall below a given threshold voltage through the source follower action of the large transistor, the output from the circuit is pulled down hard to a ground level.