The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 27, 1995

Filed:

Jun. 23, 1994
Applicant:
Inventor:

Frederick G Wall, Garland, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ;
U.S. Cl.
CPC ...
326 41 ; 326 45 ;
Abstract

A gate array base cell (100) performs logic and memory cell functions and comprises a first P-channel transistor (M1) for performing logic functions and having a first predetermined transconductance area and a second P-channel transistor (M5) for performing memory cell functions and having a second predetermined transconductance area. The second transconductance area is smaller than said first predetermined transconductance area. The gate array base cell (100) has programmable connections to first P-channel transistor (M1) and second P-channel transistor (M5) for selectively performing memory cell functions and logic functions. The gate array base cell (100) may be connected to operate as a memory cell with logic functions or separately as a memory cell or a logic gate array, such as a two-input NAND gate (128).


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