The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 20, 1995
Filed:
Nov. 06, 1992
Yasushi Takahashi, Tachikawa, JP;
Hidetoshi Iwai, Ohme, JP;
Satoshi Oguchi, Ohme, JP;
Hisashi Nakamura, Ohme, JP;
Hiroyuki Uchiyama, Fuchuu, JP;
Toshitugu Takekuma, Ohme, JP;
Shigetoshi Sakomura, Ohme, JP;
Kazuyuki Miyazawa, Iruma, JP;
Masamichi Ishihara, Hamura, JP;
Ryoichi Hori, Tokyo, JP;
Takeshi Kizaki, Higashimurayama, JP;
Yoshihisa Koyama, Akishima, JP;
Haruo Ii, Akishima, JP;
Masaya Muranaka, Akishima, JP;
Hidetomo Aoyagi, Akishima, JP;
Hiromi Matsuura, Tokorozawa, JP;
Hitachi, Ltd., Tokyo, JP;
Hitachi VLSI Engineering Corp., Tokyo, JP;
Abstract
A semiconductor memory device is provided which includes a substrate arrangement which is suitable for forming a large number of types of DRAMs having different package specifications, different bit structure and different operating modes. In conjunction with this, the bonding pads are arranged at optimum locations for accommodating the different package types. Various layout arrangements are also provided to minimize space and to improve access time. Additional features are provided, including improved output buffer circuitry, protection circuitry and testing methods to facilitate operation of the semiconductor memory device.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile