The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 28, 1995

Filed:

Jul. 14, 1993
Applicant:
Inventors:

Arye Ziklik, Sunnyvale, CA (US);

Alexander Shubat, Fremont, CA (US);

Yoram Cedar, Cupertino, CA (US);

John H Pasternak, Fremont, CA (US);

Assignee:

WaferScale Integration, Inc., Fremont, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
326 37 ; 36518908 ; 327407 ;
Abstract

An embodiment of this invention provides an integrated circuit (IC) having a configurable peripheral port which includes an input/output pin, a multiplexer coupled to the input/output pin, volatile configuration bits to control the multiplexer, and non-volatile configuration bits to control the multiplexer and override the volatile configuration bits. One embodiment of an IC also includes a peripheral port as above and functional units, such as programmable array logic (PAL) and erasable programmable read only memory (EPROM), coupled to the multiplexer. In another embodiment, a non-volatile configuration bit from a functional unit configures an input/output pin when the configuration bit is not needed by the functional unit.


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