The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 21, 1995

Filed:

Mar. 31, 1993
Applicant:
Inventors:

Michael J Allen, Rescue, CA (US);

Charles H Lucas, Fair Oaks, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; G06F / ;
U.S. Cl.
CPC ...
327436 ; 257334 ; 257350 ; 257365 ; 257371 ; 327581 ; 327530 ; 327543 ;
Abstract

An integrated circuit which includes a pair of serially arranged P channel transistor devices connected with their source and drain terminals in series. The devices are constructed as N well devices in a P substrate. Using a pair of N well devices allows higher voltages to be divided and applied across the two devices without reaching the breakdown limits of either the oxide or the junctions between different portions of the devices used in the process. These devices have been found capable of transferring ten or more volts to circuitry for programming or erasing flash EEPROM cells even the they are a part of integrated circuitry designed for only 3.3 volt usage.


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Allen, Michael. (1995). High voltage tolerant switch constructed for a low voltage cmos process (U.S. Patent No. 5399917). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5399917

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